Syllabus
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Course Code: MTCE-101 Course Name: Advanced Computer Architecture and Parallel Processing |
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| MODULE NO / UNIT | COURSE SYLLABUS CONTENTS OF MODULE | NOTES |
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| 1 | Parallel computer models: The state of computing, Classification of parallel computers, Multiprocessors and
multicomputer, Multivector and SIMD computers. Program and network properties: Conditions of parallelism, Data and resource Dependences, Hardware and software parallelism, Program partitioning and scheduling, Grain Size and latency, Program flow mechanisms, Control flow versus data flow, Data flow Architecture, Demand driven mechanisms, Comparisons of flow mechanisms |
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| 2 | System Interconnect Architectures: Network properties and routing, Static interconnection Networks, Dynamic
interconnection Networks, Multiprocessor system Interconnects, Hierarchical bus systems, Crossbar switch and multiport
memory, Multistage and combining network. Advanced processors: Advanced processor technology, Instruction-set Architectures, CISC Scalar Processors, RISC Scalar Processors, Superscalar Processors, VLIW Architectures, Vector and Symbolic processors |
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| 3 | Pipelining: Linear pipeline processor, nonlinear pipeline processor, Instruction pipeline Design, Mechanisms for instruction
pipelining, Dynamic instruction scheduling, Branch Handling techniques, branch prediction, Arithmetic Pipeline Design,
Computer arithmetic principles, Static Arithmetic pipeline, Multifunctional arithmetic pipelines Memory Hierarchy Design: Cache basics & cache performance, reducing miss rate and miss penalty, multilevel cache hierarchies, main memory organizations, design of memory hierarchies. |
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| 4 | Multiprocessor Architectures: Symmetric shared memory architectures, distributed shared memory architectures,
models of memory consistency, cache coherence protocols (MSI, MESI, MOESI), scalable cache coherence, overview of
directory based approaches, design challenges of directory protocols, memory based directory protocols, cache based
directory protocols, protocol design trade-offs, synchronization, Enterprise Memory subsystem Architecture: Enterprise RAS Feature set: Machine check, hot add/remove, domain partitioning, memory mirroring/migration, patrol scrubbing, fault tolerant system. |
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