Syllabus
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Course Code: EC-308L Course Name: Verilog HDL Lab |
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| MODULE NO / UNIT | COURSE SYLLABUS CONTENTS OF MODULE | NOTES |
|---|---|---|
| 1 | Write a Program to implement logic gates. | |
| 2 | Write a Program to implement half-adder. | |
| 3 | Write a Program to implement Full-adder. | |
| 4 | Write a Program to implement 4 bit addition/subtraction. | |
| 5 | Write a Program to implement a 3:8 decoder. | |
| 6 | Write a Program to implement an 8:1 multiplexer. | |
| 7 | Write a Program to implement an 1:8 demultiplexer. | |
| 8 | Write a Program to implement 4 bit comparator. | |
| 9 | Write a Program to implement Mod-10 up counter. | |
| 10 | Write a Program to perform serial to parallel transfer of 4 bit binary number. | |
| 11 | Write a program to perform parallel to serial transfer of 4 bit binary number | |
| 12 | Write a program to implements 8 bit ALU containing 4 arithmetic & 4 logic operation. | |
