Syllabus
Course Code: DSCE210 Course Name: Practicals |
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MODULE NO / UNIT | COURSE SYLLABUS CONTENTS OF MODULE | NOTES |
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1 | Study of fixed bias arrangement for transistors. | |
2 | Study of voltage divider biasing arrangement for transistors. | |
3 | Study of two stage R-C coupled transistor amplifier. | |
4 | Study of JFET characteristics. | |
5 | Design of basis logic gates using discrete components. | |
6 | Study of DTL NAND gate. | |
7 | Study of TTL NAND gate. | |
8 | Digital trainer using AND, OR & NOT gates. | |
9 | Digital trainer using NAND gates. | |
10 | Design a half adder using IC 7400. | |
11 | Design a full adder using two half adders | |
12 | Study of parity generator/checker. |