Syllabus
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Course Code: MMVD 205 Course Name: Lab Work – II |
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| MODULE NO / UNIT | COURSE SYLLABUS CONTENTS OF MODULE | NOTES |
|---|---|---|
| 1 | Design and simulation of MOS capacitor using Process Simulation tool. | |
| 2 | Fabrication and Characterization of MOS capacitor (I-V, C-V) | |
| 3 | Write, simulate and demonstrate Verilog model code for various Digital circuits. | |
| 4 | Advanced Analog Circuit simulation using Cadence and P-SPICE. | |
| 5 | Data flow and arithmetic logical operations programs in assembly language. | |
| 6 | “Interfacing of 8051 with external world” programs using assembly or embedded C | |
